Cache On A Stick (COAST)

What is Cache on a Stick (COAST)?

Cache on a Stick, or COAST, refers to a particular module that helps in upgrading the Level 2 cache of the computer along with the tag memory. In other words, it offers an extra layer of cache memory to the computer.

Technically, it refers to a kind of fast Pipeline Burst Static Random Access Memory (PBSRAM) technology which resembles the large Single Inline Memory Module (SIMM).

Understanding Cache on a Stick

What is Cache on a Stick (COAST)

Cache on a Stick was first implemented in the 1990s and refers to a specific kind of an external cache. The COAST typically allows adding an L2 cache to the underlying computer.

This is a specific type of technology which can be characterized as follows:

The design and features of the Cache on a Stick typically dissociate the motherboard from the cache of the system. This specific aspect of it allows for creating different configurations.

The COAST module is usually connected as a separate memory component to the Card Edge Low Profile (CELP) slot on the motherboard of the computer. This is actually a small circuit board that has conductors on its edges.

On each side of the circuit board there are as many as 80 contacts placed 0.05 inches apart. There is also an ID notch between contacts 42 and 43.

The COAST standard was first conceived by Motorola in the early 1990s. The physical size of the standard was typically as follows:

The same standard was also followed on the Apple Macintosh computers.

Intel also used this standard in their early Pentium systems, such as the Pentium MMX system in 1998. It typically used specific Intel chipsets such as:

Later on, this architecture was combined by Intel with the Central Processing Unit (CPU) resulting in the Slot 1 CPU cartridge. This came with both the CPU as well as independent cache chips.

However, a lot of manufacturers did not adhere to the physical or electrical specifications. Typically, the electrical specification for these sticks needed the clock tree for each individual synchronous chip to be perfectly balanced.

This means that the length from each edge to each chip should be equal. This is an important aspect because an unbalanced clock tree would have adverse effects on the performance such as:

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Operation

The 256 KB or 512 KB space of the COAST is usually systematized as 8192 or 16384 lines of 32 bytes. The cache line can be transferred through a 64-bit data bus in a four-cycle burst.

Its operation is further facilitated by two specific features such as:

Ideally, the SRAM is even faster in comparison to the PBSRAM and helps each line to store the cache tags.

Different size of tag will allow for storing different amount of memory, such as:

Every cache line in it will also have both a dirty bit and a valid bit contained in the cache controller, which will be 16 Kbits, or 2 Kbytes, in total size.

However, in comparison, a 512 KB module will store twice that number of cache lines. This means that it will take one less tag bit to support an equal cacheable memory size.

The remaining tag bit is used for storing the cache line dirty bit instead and all of the 16 Kbits available in the cache controller are implemented for valid bits.

Conclusion

COAST or Cache on a Stick refers to a specific module package that comes with an SRAM and is used as the Level 2 cache in the computer.

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Resembling a large-size SIMM, this cache communicates with the primary memory of the system and other memory modules through the data buses of the computer.