What is Clock Doubling? (Explained)

What is Clock Doubling?

Clock doubling is a technology used in the processors to initiate information at a speed double than the usual speed of the bus.

KEY TAKEAWAYS

• Clock doubling is a process where the clock multiplier of the CPU is actually increased.
• The process actually changes the frequency inside the CPU, and it does only that ‘inside’ the CPU. This means that all other components of the computer will be slow.
• Clock doubling may increase the performance of the CPU to some extent but will certainly not double the performance of the computer system as a whole.

Understanding Clock Doubling

Clock doubling is a technique that was popularized by Intel with their 486 Speed Doubler chips.

This process allowed increasing the internal processing speed of the processor but maintaining the actual speed of the I/O.

Looking at the history of clock doubling, the first processor to use this technology was the 80486 from Intel which allowed it to run at a speed doubled to 50 MHz.

Doubling the clock frequency of the CPU does not necessarily translate to doubling the performance of the processor overall.

In fact, doubling the clock frequency of the CPU may reduce the performance of the computer by half, and there are a few good reasons to say so, which are:

• It all depends on the peripherals used to communicate with
• It is also dependent on the specific code that is being executed by the processor at that specific time and
• The inverse relationship of the clock frequency of a CPU with its performance provided that the CPI or Cycles per Instruction and number of instructions are constant.

Moreover, the maximum clock frequency is typically determined by the hardware used along with its physical constraints such as:

• The signal propagation time
• The speed at which the transistors switch and more.

However, clock doubling influences only the output and not latency. Therefore, it is good in a way to get your job done quickly.

This is because there are a few aspects of CPU processing whose timings are not determined or influenced by the frequency of the clock.

One such aspect is latency, which is caused by the signal propagation in the traces or cables.

This, however, is true only when it is assumed that the CPU does not have to wait for something that is dependent on the clock frequency.

There are several such things which include but are not limited to:

• IO
• Network data
• I2C or Inter Integrated Circuit communication
• Data delivered by the ADC or the Analog to Digital Converter.

This is particularly the case with the timing of the DDR SDRAM or Double Data Rate Synchronous Dynamic Random Access Memory.

If this timing is tweaked, then you will also have to add a little bit of wait cycle time or latency to the actual time.

This is because the actual time required by the chip to access the data is normally not dependent on the clock.

How to Double Clock Frequency?

Doubling the clock frequency can be done in two specific approaches namely, ‘putt-putt-wait’ and ‘putt-putt-skip.’ In order to get an accurate square signal, you may even do it twice and divide it once by using a flip-flop.

Putt-Putt-Skip:

In this approach, you will need to use a free-running oscillator. This will run three to four times as fast as the input clock.

You will have to count the pulses received on the input clock and the number of outputs.

You will have to latch the number counts from the reference input on every clock from the local oscillator.

And if the latch count earlier is not half the number of the output pulses, you will then have to output a pulse.

If the output pulse is based on the earlier latch count it will add an additional phase delay equal to the local clock.

However, it will eliminate the chances of giving out any runt or Meta stable clock pulses.

Putt-Putt-Wait:

In this approach, you will need an oscillator that would run each time the reference count is not half of the number of the output pulse and stop when it is equal.

Make sure that the oscillator can be started and stopped effortlessly.

Otherwise, the process will produce a more consistent phase relationship among the waveforms of the inputs and outputs than the putt-putt-skip approach would. It will also make it less energy efficient.

Doubling the frequency can be very simple if you can solve the duty cycle, even approximately, by altering the number of gates in series.

However, this will be good for only one frequency and may be sensitive to other components such as temperature and characteristics.

You will surely need a PLL or a Phase Lock Loop for it.

This is because if you use just logic gates, it will also need some additional delays to be included by means of R/C time constants.

This will bring the doubled pulses close to 50% duty cycle.

Moreover, if you double the clock frequency by using only the logic gates, it will actually pass via the buffer with a propagation delay almost equal to a quarter of the clock period.

It will then XNOR both the clocks simply to get twice the frequency.

However, this will usually not happen inside the FPGA or Field Programmable Gate Array unless some signal pins of the part are brought to the place where the RC can be attached and subsequently fed back into the other pins.

What Will be the Data Transfer Rate If the Clock Rate is Doubled?

When the clock rate is doubled, it will increase the data transfer rate because the bus will be much faster. The peak bandwidth of it will be theoretically doubled while doubling the clock speed.

Everything in the CPU will work at double the speed now because the CPU is twice as fast.

However, in reality, clock doubling will not double the performance but it will surely enhance the speed to a significant extent, though it will be within the fine print.

It will happen only as long as the frequency is under the maximum limit and the increased clock frequency does not call for additional configuration.

Each type of hardware has different frequencies it works best at, and increasing the clock speed may require a fancier design and additional pipeline stages.

This means that the performance of the hardware at a slower clock frequency will not be on par with the performance at a higher frequency, and that applies to the CPUs.

That is why clock doubling is hardly required today in the processor because most of the CPUs have the ability to operate without relying on the Front Side Bus or FSB since they are directly connected to the Northbridge.

Complicated systems such as System on Chip or Soc, large microcontrollers and computers come with different parts that have their own different clocks.

For example, in a personal computer, you have different parts with different frequencies such as:

• The Central Processing Unit or CPU cores
• The chipset
• The RAM or Random Access Memory and
• The different buses.

Even the caches have different frequencies of operation sometimes.

Therefore, clock doubling does not really matter much, though it can be said that if all the clocks of all these components of the computer system are scaled by the equal factor, then the performance would also scale up to that proportion.

When is Clock Frequency Doubled?

Ideally, there are possibly two specific situations when you would want to double the clock frequency.

One is when you want the logical circuit to run at a higher speed and when you want to reduce the time taken to complete the basic operations.

Conclusion

Clock doubling will increase the speed of operation of the CPU to a considerable extent, but it will do so only under certain conditions.

If the CPU is twice as fast but the RAM or the HDD are not, it will certainly not double the performance of the overall computer system.