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What is SPD (Serial Presence Detection)?
SPD, or Serial Presence Detection, basically refers to the Read Only Memory (ROM) chip integrated on the memory modules to report different properties of the module such as its speed, size and more.
Technically, it refers to an added chip in the memory that holds 128 Hex bytes of info about it. It also refers to a specific communication method followed by the DIMMs with the BIOS by using two special pins to transmit the data serially.
- Serial Presence Detection is the ROM chip on a memory module.
- SPD communicates different features of the memory module such as its speed, voltage, size and more.
- This specific part of the memory modules makes the information about the module available to the BIOS more easily.
- Two specific pins are used in this technique to transfer the data in serial.
- The higher the SPD speed, the faster the system will run.
Understanding SPD (Serial Presence Detection)
Serial Presence Detection is actually the info held in the Electrically Erasable Programmable Read Only Memory (EEPROM) chip during the boot up process of the computer system.
Ideally, the SPD communicates different information regarding the features and capacities of the memory module to the BIOS, such as:
- The manufacturer
- The size
- The row and column addresses
- The speed
- The data width
- The voltage
The information is typically placed on the EEPROM chip by the manufacturer of the memory module.
If there is no such SPD information available in the BIOS, the computer will assume it all and continue with the bootup process.
However, all these are necessary for the configuration of the memory controller of the module to ensure optimum performance and reliability.
It is also necessary for the BIOS to identify the memory module correctly during POST or Power On Self Test so that the motherboard may know what specific timings to be used based on the characteristics of the memory chip.
Typically, the Parallel Presence Detection (PPD) method was followed with the previous 72-pin SIMMs.
The standard was changed to Serial Presence Detection in the 168-pin DIMM models and later at the same time when the SDRAM was introduced.
This specific standard is more useful than the earlier PPD method because it can encode a lot more information in comparison.
Data is communicated by the Dual Inline Memory Modules or DIMMs in this method by using two pins instead of one, which helps in transferring data in serial as opposed to the former parallel method, where each pin denoted a single bit.
- Memory modules that support SPD need a few parameters of the Joint Electron Device Engineering Council (JEDEC) standards to be in the lower 128 bytes of the EEPROM.
- SMBus, an I2C protocol variant, is used to access the SPD EEPROM firmware.
- The SPD specification was issued first by JEDEC and further developed by Intel as a part of the PC100 memory specs.
- Three Dynamic Random Access Memory (DRAM) timings for one higher and two lower Column Address Strobe (CAS) latencies are defined by SPD ROM.
- The extension of the SDRAM format is used in the DDR DIMM SPD format.
- The DDR2 SPD format comes with several changes including the notable deletion of the little-used and confusing DIMM support and two different-sized ranks.
- The SPD content layout is further simplified in the DDR3 SDRAM standard with the use of different time base units and timing parameters.
- The EEPROM model used in the DDR4 SDRAM standard for SPD is changed from the traditional AT24C02-compatible 256-byte EEPROMs to a nonstandard EE1004 type with two pages of 256 bytes each at SMBus level.
- The SPD table is increased to 1024 bytes in DDR5 and uses the I3C bus.
- NVIDIA and Corsair use Enhanced Performance Profiles as an extension of SPD with additional information about command timing, supply voltages, and others.
- Intel developed a similar JEDEC SPD extension for DDR3 SDRAM DIMMs using 176 to 255 bytes in XMP for higher performance and memory timings.
- EXPO or Extended Profiles for Overclocking of AMD is a JEDEC SPD extension used for DDR5 DIMMs that allows an automatic, single-click overclocking profile to be applied to the system memory.
Memory SPD Failure
SPD failures or errors are typically the results of the conflicts between the Basic Input Output System (BIOS) setting and the Random Access Memory (RAM) timings.
There can be different types of SPD failures, for example:
- You will get such an error when you enable SPD on the BIOS but do not have SPD RAM, which are sticks that come with SPD modules installed in them.
- You will also get SPD errors if the clock speeds of any of the RAM modules, the CAS rating and the chips differ from one another.
Some computer systems in which the memory modules are soldered directly to the motherboard may not have an SMBus interface.
This will not allow them to access the raw SPD data usually hardcoded in the BIOS firmware directly and result in such a failure.
Also, in systems running on an Intel Xeon chipset with Temperature Sensor on DIMM (TSOD) support, the hardware TSOD polling may interfere with the process of collecting SPD data.
This will result in incorrect or missing SPD information and, eventually, in an SPD failure.
Apart from that, in a few specific platforms, such as in ASUS, SPD Write is disabled by default. This will once again prevent accessing the raw data in SPD and result in a failure.
All such failures and errors may result in data corruption and even unpredictable system crashes.
Where is SPD in the BIOS?
Though in a few specific BIOS settings you may get the SPD located under the Extreme Tweaker tab, such as in ASUS, ideally, it resides on the Synchronous Dynamic Random Access Memory (SDRAM) module and communicates with the BIOS.
The SPD or Serial Presence Detection helps in communicating the features, capacity and characteristics of the memory module used in a computer system to the BIOS.
This helps the BIOS to identify the memory much more easily during POST. SPD with a high speed makes the computer system run much faster.